%@LANGUAGE="VBSCRIPT" CODEPAGE="936"%>
国家集成电路设计深圳产业化基地
|
|
|
|
|
|
| 硬件配置、软件配置(设计工具)及其他配置
基地现有的Synopsys产品
RTL Synthesis |
1 |
DC Ultra |
2 |
HDL Compiler Verilog |
3 |
VHDL Compiler |
4 |
Design Vision |
5 |
Power Compiler |
6 |
DFT MAX |
7 |
Module Compiler |
8 |
08、Library Compiler |
9 |
TetraMAX |
Concurrent Physical Design |
1 |
JupiterXT |
2 |
Astro |
3 |
Physical Compiler |
4 |
IC Compiler |
Sign - Off |
1 |
Astro-Rail |
2 |
Astro-Xtalk |
3 |
PrimeRail |
4 |
Pathmill |
5 |
PrimeTime |
6 |
PrimeTime SI |
7 |
Star-RCXT |
8 |
Hercules |
DesignWare IP |
1 |
DesignWare Library |
2 |
DesignWare Developer |
Design Database |
1 |
Milkyway Environment & RunTime C-API |
2 |
Milkyway C-API Dev. |
System Analysis and Design |
1 |
System Studio |
Smart Verification |
1 |
VCS |
2 |
VCS MX |
3 |
LEDA checker |
4 |
Pioneer NTB with Vera |
5 |
Formality |
Mixed – Signal Verfication |
1 |
Cosmos-Scope |
2 |
CosmosLE |
3 |
CosmosSE |
4 |
Hsim |
5 |
Hspice |
6 |
Hspice RF |
7 |
NanoSim |
|
|
| |
|
|
| |
国家集成电路设计深圳产业化基地管理中心 深圳市高新技术产业园区中区科技中二路软件园一期四号楼六楼
电话:0755-86168939 86168684 传真:0755-86168949 Email:Center@szicc.net |
|